Non-volatile memory devices are well known in the art. There have been two types of interface disclosed with regard to access to a non-volatile memory device: serial and parallel. In a parallel device, the data, address and command lines are typically provided separately to the device, in parallel. Although this architecture requires a large number of pins, the ability to provide data and address in parallel lines, permits what is called execute in place operation, i.e. the memory device can execute a command stored in the non-volatile memory cells. In a serial device, such as that exemplified by U.S. Pat. Nos. 6,038,185 and 5,663,922, the interface to the non-volatile memory device is typically by a single line providing data, address and commands in serial, and multiplexed. Thus, for example, to provide a one byte of data (one byte=8 bits) eight data signals must be provided on the single line. In addition the single line sometimes must also accommodate address signals, as well as command signals in a multiplexed manner. Although a serial device requires a minimal number of pins and can operate at a faster speed, the serial nature of the architecture does not permit execute in place commands. Other prior art that may be relevant include U.S. Pat. Nos. 4,943,962; 5,325,502; 5,991,841, and 7,027,348.